The Key To Test-driven Development of RTL

For me, this is a very exciting post because I think I’ve made some pretty important headway regarding TDD for hardware designers.

My big side project as of late has been a real pilot dedicated to using TDD to write RTL. I’ve blogged about some of the things I’ve learned already but the big eye-opener that I haven’t talked about yet is how TDD helps us with design partitioning and testability. Continue reading

Now What?

You’ve started doing TDD or unit testing your systemverilog code with SVUnit, your defect rate is down and you’re producing better code. You’re at the point where your experience could benefit the rest of your team but you’re not sure how to get the point across.

What do you do? Continue reading

Shame On Me (Why I Use Test-driven Development)

When I hear the word shame, there is only one thing that comes to mind: Slapshot. If you’re Canadian, chances are you already know what I’m talking about. To everyone else, Slapshot is a hockey movie and shame comes from an interview where Jim Carr is talking penalties with Denis Lemieux, goalie for the Charlestown Chiefs. Denis comes up with this to describe high-sticking, slashing, tripping, hooking and spearing… Continue reading

Honey… I’m Being Eaten By A Bear: 10 Need to Know Tips

Last week I stumbled across a verification post that used my favorite verification graphic from the Wilson Research Group Functional Verification Survey that Mentor sponsors every few years. Here it is again for anyone that hasn’t seen it posted here before (I’m sure this makes about a half-dozen times for me. It is, after all, my favorite verification graphic)… Continue reading

UVM Is Not A Methodology (The TDD Remix)

Forgot about this in last week’s post! Another interesting question from the functional verification seminar I delivered in Mountain View a few weeks ago was: if you could only pick one or the other, would you rather use UVM or test-driven development? Of all the great questions that came up, that was by far the easiest to answer. My response…

I’d take TDD over UVM any day. No contest.

Continue reading

UVM Report Mock Update

Get the latest version of SVUnit from GitHub

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I’ve had some good feedback from a couple fellows using the report mock and today I released a new version to start incorporating it. SVUnit v1.4

includes a new UVM report mock.

Two significant changes… Continue reading

Verifying UVM Error Conditions with SVUnit UVM Report Mock

Verifying error conditions and UVM testbench checkers just got easier! The SVUnit UVM report mock lets you automate testing of UVM errors and fatals to increase confidence that the checkers in your testbench are defect free. The SVUnit UVM report mock is a scoreboard style checker where actual and expected errors are logged and compared to trigger a PASS/FAIL result.

Here’s how it works… Continue reading