FunCov is a web-based EDA tool for building custom Verilog functional coverage models for common chip-level protocols. I’ve been working on it since August. First official release is available now. New features are already on the way.
FunCov helps engineers avoid the tedium of writing functional coverage code. It’s free and easy to use. There is no installation or setup; all that’s required is a browser and an internet connection. Best of all, FunCov is a platform for crowdsourcing functional coverage. It enables collaboration between developers with the goal of solving shared industry problems quickly and efficiently.
How Does FunCov Work?
Three steps: pick a protocol, customize your IP by selecting from a set of previously defined coverage points and configuring ports, then download your custom functional coverage IP. That’s it.
To start, FunCov includes Verilog coverage models for AHB, APB and AXI4-Stream. Over time, the library will grow to include others.
What’s Crowdsourced Functional Coverage?
FunCov makes it easy for engineers to work together without even knowing it. Crowdsourced functional coverage models start with a basic yet complete set of coverpoints for each protocol in the library. As usage models evolve and functional coverage requirements grow, users can easily add new signals, coverpoints and cross-coverpoints all through the web interface. These new additions are saved to the library and shared with other users. The result? FunCov becomes a growing library of functional coverage that’s accessible to all. Anyone can contribute and we all benefit.
The first release of FunCov is available on the AgileSoC.com tool portal so developers can start building custom functional coverage models immediately.
You can also expect a continuous stream of new features and enhancements over the coming weeks and months. The roadmap shows what I have planned. If there’s something you want from FunCov that you don’t see in the roadmap, I’d be more than happy to take feature requests at firstname.lastname@example.org.
Give FunCov a Try
I was tired of constantly relearning Systemverilog coverage constructs every time I had to write new coverage code. I also felt like Systemverilog forced a lot of duplication so I was writing the same code over and over again. That’s why I’m building FunCov. I see it saving me some time so I can get on to the other important stuff. If you’re a design or verification engineer looking for a functional coverage headstart, give FunCov a try. If you like what you see, I’d appreciate an email at email@example.com to let me know!