I’ve come to a checkpoint in the construction of the AMBA IP library that’s packaged with MiniTB. After some part-time development over the last couple months, I have read/write support for ABP and basic read/write support for AHB (you can see the full list of supported features here). These are open-source masters and slaves that I developed using MiniTB.
Next step is AXI, which I’ll start later today. But before I go there, I wanted to share some lessons learned… Continue reading →
Last week I posted an initial version APB master. This week is an updated APB and an initial AHB master. These are open-source verilog BFMs packaged and ready for use in MiniTB, an open-source responsible development platform. Continue reading →
Today, I released a first version APB master BFM with MiniTB. This is the first in a few steps I’m hoping we take in the development of MiniTB. I’d like to provide a user-friendly platform for developers building SoCs with AMBA interconnect. APB was the simplest place to get started. Depending on interest, we’d move on to AHB and/or AXI IP as well. Continue reading →
MiniTB is a simple yet powerful responsible development platform (RDP) that provides design and verification engineers with an alternative to complex verification methodologies like UVM.
That’s what should have been part of the initial announcement I made releasing MiniTB a few months ago. Originally, I envisioned it a smoke testing platform for RTL design engineers. Leaving it at that, though, I think underestimates the power of the simple platform Jean-Marc and I put together and the success people can create with it. MiniTB is not just a framework for smoke testing RTL, it’s a responsible development platform that addresses many of the concerns people have with current methodologies and techniques.
Complexity is always the first complaint people have when it comes to UVM. Second is how the addition of OO programming constructs to SystemVerilog has become the wedge that’s been driving design and verification engineers apart for the last decade. MiniTB intentionally stresses a level of simplicity and inclusiveness that have been optimized out of methodologies like UVM – slowly and deliberately.
MiniTB is powerful in that it gives you the flexibility to control your own destiny without locking you in. While it neither provides nor enforces complex methodologies around stimulus generation, configuration or communication, it also does not preclude you from leveraging existing methodologies or creating your own as you see fit. In short, MiniTB does not attempt to impose solutions upon functional verification engineers, it simply provides the framework and run-flow in which people are free – design and verification engineers alike – to create solutions that make sense to them.
If you’re a design or verification engineer that is tired of the complexity, try MiniTB.
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Through the hardware industry’s continuing infatuation with leading verification technologies – constrained-random verification, functional coverage, numerous fancy methodologies, intelligent testbenches and a host of others – the needs of designers have been thoroughly ignored. That changes with MiniTB. Continue reading →