MiniTB Getting Started

Why MiniTB?

Good question. If you a designer proud enough to take responsibility for the quality of your code instead of waiting for verification engineers to do it for you, you’ll like MiniTB. MiniTB let’s you easily smoke test your design in a simple testbench structure so you can find and kill the bugs that no one else needs to see.

MiniTB Download and Setup

Download to setup is about a 3 minute procedure…

Get the latest version of MiniTB from Github

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  • Download the latest version of MiniTB from Github by clicking the big blue button to the right.
  • Extract the MiniTB archive
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  • Source the MiniTB setup script (bash users source Setup.bsh. csh users source Setup.csh)
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Running the MiniTB Examples

For more elaborate examples of what you can do with MiniTB, check out these examples packaged with MiniTB. Both examples have README files to explain how to run them.

  • examples/modules/apb_slave – This is a verilog APB slave module being verified with a set of simple read/write accessibility tests.
  • examples/modules/ahb_slave – This is a verilog AHB slave module being verified with a set of simple read/write accessibility tests.

Building Your First New Module With MiniTB

It’ll take you about another 2 minutes to get a new project started from scratch. Here are the steps for building a new module with MiniTB. It has 1 output that’s driven high. We’ll use a MiniTB smoke test to make sure that happens.

  • Create and/or ‘cd’ to a new project directory
  • Start a module-under-test

Screen Shot 2013-10-08 at 10.17.44 AM

  • generate a new MiniTB template

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  • add a test to your unit test template using the SMOKETEST/SMOKETEST_END macros

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  • Run your new test using your simulator of choice!
    • For Mentor Questa
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    • For Cadence Incisive
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    • For Synopsys VCS
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  • In the logged output, find the passing ‘MiniTB Exit Status’

Screen Shot 2013-10-08 at 10.19.03 AM

2 thoughts on “MiniTB Getting Started

  1. Hi
    We are using ModelSim DE under windows for verifying our VHDL embedded FPGA designs.We have been using SystemVerilog for about 2 years building our testbenches. Does SVUnit only run under Linux?

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