I’m Not Anti-Constrained Random…

I’m anti-constrained random. I would never use constrained random. I think it’s an overhyped technique that doesn’t produce the results we think it does. People would be better off forgetting about it and going back to directed testing.

Ok… a little strong perhaps, but if you’ve read my posts (aka: rants) on constrained random verification, you may be assuming that’s what I think of it; that constrained random is something I’m opposed to and that I’ve turned back the clock to the directed testing stone ages.

Not true.
Continue reading

Guest Blog: A Heretic Speaks (Why Hardware Doesn’t Fit the Agile Model)

Fair to say that what we’ve posted on AgileSoC.com to date is decidedly pro-agile. Bryan, myself and the guest bloggers we’ve had thus far believe in agile hardware development so we haven’t spend much time talking about why agile hardware wouldn’t work. No surprise there. But when you’re getting a steady diet of opinions from one side of an argument, it can be easy to forget that there can be some very practical arguments on the flip side to the coin. Today – after a little cajoling from Bryan over the past year – Mike Thompson from Huawei in Ottawa brings a little balance to AgileSoC.com by examining the flip side of the coin. Continue reading

You’re Either With Me Or You’re With: The UVM Sequencer

Time for a new series of posts on agilesoc.com. I think it’ll be best to call this a series of challenges to the functional verification community at large. I’ll point out techniques that have irked me, wonder aloud why we use them and then challenge people to propose alternatives. The important part of this is not to agree or disagree with me (though obviously feel free to do either). What I’m hoping for is that people will stop and do a little navel gazing (aka: a powerful technique for fostering creative thinking that we don’t schedule nearly enough time for), to think a bit about what we do and why we do it. I’m sure some of these posts will come off as ranting which I’ll say from the outset I won’t be apologizing for! But I’m looking to get people talking, not put people on the defensive. These are meant as honest, constructive food-for-thought so keep that in mind as you’re reading.

Ready? It’s time to get heated! It’s time to get opinionated! It’s time to pick sides!!

You’re either with me, or you’re with: the UVM sequencer! Continue reading

Quality Lag and Debug Lag with Constrained Random Verification

If you’ve read Does Constrained Random Verification Really Work and Functional Verification Doesn’t Have to be a Sideshow, you’ll know that I’ve become a bit of a skeptic when it comes to constrained random. My opinion hasn’t changed much since those posts and I think I’ve got a couple visuals that will help people see the point I was arguing in Functional Verification Doesn’t Have to be a Sideshow, that a successful constrained random verification effort starts with directed testing… a lot of directed testing. Continue reading